Trung Canh Nguyen
FPGA developer | Dec-30-1990
Hanoi, Vietnam
Hello, this is Nguyen Canh Trung. You can call me “Trung”.
I am an FPGA developer who works mainly in 5G communication sector. I had spent the first 3-years to work as a system integration for 5G-RRU (Remote Radio Unit) which focusing on high-speed interfaces such as JESD204B
, eCPRI
and PCIe
. The other part of the job was to integrate DPD
, CFR
and LOW PHY
solutions into fabric.
Later on, my works was focusing on designing and implementing IP cores for Xilinx and Intel platforms which includes 5G-NR Layer 1 and ISP accelerators.
Currently, I am participating in a project to design a “5G-verification system” (5G testbed). I am proficient at both Traditional RTL design flow
and High Level Synthesis design flow
.
During my working time, I realize that I need a space to summarize what I have learned. It can also be a place that I can share my knowledge and experience to someone that may need. This website is a result of the process.
I hope you can find something interesting here. Feel free to drop me a line via email!
Thank you!
News
Oct 7, 2022 | Quartus - Using signal tap to debug the design on board |
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Oct 5, 2022 | Quartus - Programming FPGA |
Oct 3, 2022 | Quartus - Hello World! |
Oct 1, 2022 | Stratix 10 - reset release IP |
Dec 30, 1990 | When I came to Earth |